Linux Clock - clk_hw_register_fixed_factor

Studying note:

struct clk_hw *clk_hw_register_fixed_factor(struct device *dev,
  const char *name, const char *parent_name, unsigned long flags,
  unsigned int mult, unsigned int div)

Look at this driver file "clk-stm32h7.c".

 /* D1 DOMAIN */
 /* * CPU Systick */
 hws[CPU_SYSTICK] = clk_hw_register_fixed_factor(NULL, "systick",
   "d1cpre", 0, 1, 8);

name: "systiclk"
parent_name: "d1cpre"
flags: 0
mult: 1
div: 8

Doesnt understand anything at all, so referring reference manual DM00314099.pdf, page 331.

The clock value depends on the parent clock, so CPU Systick clock is D1CPRE(1) / 8.

Let look another example:

 hws[CSI_KER_DIV122 + n] = clk_hw_register_fixed_factor(NULL,
   "csi_ker_div122", "csi_ker", 0, 1, 122);

Referring to same databook, page 344.

parent clock is "csi_ker", then it is divided with 122, and the new clock source "csi_ker_div122".